CPLDs for prototyping a mapper or for manufacturing it in low quantities are sized in macrocells. Each macrocell can hold one bit of state, such as one bit of the value of a register or one bit for an internal latch. For example, MMC1 is 25 macrocells: 20 for the mapper registers and 5 for the shift register. The more macrocells, the more expensive the CPLD, especially if you're trying to use the older, NES-compatible 5.0 volt parts. How many bits do you think are in this mapper? --Tepples 14:11, 18 August 2010 (MST)
It's pretty embarassing: 1148
128*8 - Namco 106 RAM 6 *4 - PRG banks 6 - Config 1 6 - Config 2 4*4*4 - Portals 6 *4 - Fixed portals
( though if I took the expansion sound away I'd be using about 100 )
--Nova Storm the Yoshifox 15:21, 11 March 2011 (MST)